A3000 rev6.1 030@25MHz
2MB chip
4MB fastmem (static column memory, 8 x ZIP HM514402CZ6)
ROM timing at fastest 160ns setting (70ns MX27C2048 OTP EPROMs in U182 and U183):
 - Gives as high read bandwidth as the DIP fastmem when measuring with
   bustest so should be equivalent in performance to "Cpu FASTROM".
Ramsey 390541-04
Super DMAC 390537-02
Super Buster 390539-11
Kickstart 3.1
Workbench 3.1


2.System3.1:> ramseyconfig            
RamseyConfig 1.1 ©SpeedGeek 2015
Ramsey version = $D
Page mode      = 0
Burst mode     = 1
Wrap mode      = 0
Refresh mode   = 238

2.System3.1:> cpu
System: 68030 68882 (INST: Cache Burst) (DATA: Cache NoBurst)
2.System3.1:> bustest fast rom chip
BusSpeedTest 0.19 (mlelstv)   Buffer:     262144 Bytes, Alignment: 32768
========================================================================
memtype   addr       op         cycle     calib         bandwidth
fast      $07C48000  readw     249.1 ns   normal       8.0 * 10^6 byte/s
fast      $07C48000  readl     329.1 ns   normal      12.2 * 10^6 byte/s
fast      $07C48000  readm     303.3 ns   normal      13.2 * 10^6 byte/s
fast      $07C48000  writew    248.7 ns   normal       8.0 * 10^6 byte/s
fast      $07C48000  writel    248.3 ns   normal      16.1 * 10^6 byte/s
fast      $07C48000  writem    220.2 ns   normal      18.2 * 10^6 byte/s
chip      $00028000  readw     774.9 ns   normal       2.6 * 10^6 byte/s
chip      $00028000  readl     775.8 ns   normal       5.2 * 10^6 byte/s
chip      $00028000  readm     643.4 ns   normal       6.2 * 10^6 byte/s
chip      $00028000  writew    572.7 ns   normal       3.5 * 10^6 byte/s
chip      $00028000  writel    573.2 ns   normal       7.0 * 10^6 byte/s
chip      $00028000  writem    572.7 ns   normal       7.0 * 10^6 byte/s
rom       $00F80000  readw     242.6 ns   normal       8.2 * 10^6 byte/s
rom       $00F80000  readl     322.6 ns   normal      12.4 * 10^6 byte/s
rom       $00F80000  readm     298.4 ns   normal      13.4 * 10^6 byte/s

2.System3.1:> cpu cache burst
System: 68030 68882 (INST: Cache Burst) (DATA: Cache Burst)
2.System3.1:> bustest fast rom chip       
BusSpeedTest 0.19 (mlelstv)   Buffer:     262144 Bytes, Alignment: 32768
========================================================================
memtype   addr       op         cycle     calib         bandwidth
fast      $07C90000  readw     202.0 ns   normal       9.9 * 10^6 byte/s
fast      $07C90000  readl     243.6 ns   normal      16.4 * 10^6 byte/s
fast      $07C90000  readm     303.4 ns   normal      13.2 * 10^6 byte/s
fast      $07C90000  writew    248.4 ns   normal       8.1 * 10^6 byte/s
fast      $07C90000  writel    248.6 ns   normal      16.1 * 10^6 byte/s
fast      $07C90000  writem    220.4 ns   normal      18.2 * 10^6 byte/s
chip      $00028000  readw     786.4 ns   normal       2.5 * 10^6 byte/s
chip      $00028000  readl     786.8 ns   normal       5.1 * 10^6 byte/s
chip      $00028000  readm     643.0 ns   normal       6.2 * 10^6 byte/s
chip      $00028000  writew    572.9 ns   normal       3.5 * 10^6 byte/s
chip      $00028000  writel    572.2 ns   normal       7.0 * 10^6 byte/s
chip      $00028000  writem    573.3 ns   normal       7.0 * 10^6 byte/s
rom       $00F80000  readw     243.0 ns   normal       8.2 * 10^6 byte/s
rom       $00F80000  readl     323.8 ns   normal      12.4 * 10^6 byte/s
rom       $00F80000  readm     298.8 ns   normal      13.4 * 10^6 byte/s