A3000 rev6.1 030@25MHz
2MB chip
16MB fastmem (static column memory, 32 x ZIP HM514402CZ6)
ROM timing at fastest 160ns setting (70ns MX27C2048 OTP EPROMs in U182 and U183):
JP851 at 1-2 (16MHz mode, removes one wait state during normal accesses, for more
details see ramsey documentation)
Ramsey 390541-04
Super DMAC 390537-02
Super Buster 390539-11
Kickstart 3.1
Workbench 3.1

2.System3.1:> ramseyconfig            
RamseyConfig 1.1 ©SpeedGeek 2015
Ramsey version = $D
Page mode      = 0
Burst mode     = 1
Wrap mode      = 0
Refresh mode   = 154

2.System3.1:> bustest fast rom
BusSpeedTest 0.19 (mlelstv)   Buffer:     262144 Bytes, Alignment: 32768
========================================================================
memtype   addr       op         cycle     calib         bandwidth
fast      $07820000  readw     222.4 ns   normal       9.0 * 10^6 byte/s
fast      $07820000  readl     282.2 ns   normal      14.2 * 10^6 byte/s
fast      $07820000  readm     264.1 ns   normal      15.1 * 10^6 byte/s
fast      $07820000  writew    207.6 ns   normal       9.6 * 10^6 byte/s
fast      $07820000  writel    208.4 ns   normal      19.2 * 10^6 byte/s
fast      $07820000  writem    196.8 ns   normal      20.3 * 10^6 byte/s
rom       $00F80000  readw     242.8 ns   normal       8.2 * 10^6 byte/s
rom       $00F80000  readl     323.1 ns   normal      12.4 * 10^6 byte/s
rom       $00F80000  readm     299.2 ns   normal      13.4 * 10^6 byte/s